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$07: Mode Register (Read/Write)
MODE
D7
IAH
0
D6
IPP
0
D5
SCPS
0
D4
ASE
0
D3
AWE
0
D2
TON
0
D1
-
0
D0
MODE
0
NOTE: Writing to the Mode register resets sleep timing, and clears the XOUT, YOUT, ZOUT, TILT registers.Reading to
the Mode register resets sleep timing.
NOTE: The device must be placed in Standby Mode to change the value of the registers.
Table 10. Modes
Mode of Operation
Standby Mode
Test Mode
Active Mode
D0 - MODE
0
0
1
D2 - TON
0
1
0
NOTE: The device can only enter into Test Mode, when the previous mode was Standby Mode. If the device was in
Active mode, set MMA766FC to Standby Mode (MODE = TON = 0), then enter Test Mode (MODE = 0, TON = 1).
MODE
0: Standby mode or Test Mode depending on state of TON
1: Active mode
Existing state of TON bit must be 0, to write MODE = 1. Test
Mode must not be enabled.
MMA7660FC always enters Active Mode using the samples
per second specified in AMSR[2:0] of the SR (0x08) register.
When MMA7660FC enters Active Mode with
[ASE:AWE] = 11, MMA7660FC operates Auto-Sleep
functionality first.
TON
0: Standby Mode or Active Mode depending on state of
MODE
1: Test Mode
Existing state of MODE bit must be 0, to write TON = 1.
Device must be in Standby Mode.
In Test Mode (TON = 1), the data in the XOUT, YOUT and
ZOUT registers is not updated by measurement, but is
instead updated by the user through the I 2 C interface for test
purposes. Changes to the XOUT, YOUT and ZOUT register
data is processed by MMA7660FC to change orientation
status and generate interrupts just like Active Mode.
Debounce filtering and shake detection are disabled in Test
Mode.
AWE
0: Auto-Wake is disabled
1: Auto-Wake is enabled.
When Auto-Wake functionality is operating, the AWSRS bit is
the SRST register is set and the device uses the samples per
second specified in AWSR[1:0] of the SR (0x08) register.
When MMA7660FC automatically exits Auto-Wake by a
ASE
0: Auto-Sleep is disabled
1: Auto-Sleep is enabled
When Auto-Sleep functionality is operating, the AMSRS bit is
the SRST register is set and the device uses the samples per
second specified in AMSR[2:0] of the SR (0x08) register.
When MMA7660FC automatically exits Auto-Sleep because
the Sleep Counter times out, the device will then switch to the
samples per second specified in AWSR[1:0] of the SR
register. If AWE = 1, then Auto-Wake functionality is now
enabled ( Table 11 ).
SCPS
0: The prescaler is divide-by-1. The 8-bit internal Sleep
Counter input clock is the samples per second set by
AMSR[2:0], so the clock range is 120 Hz to 1 Hz depending
on AMSR[2:0] setting. Sleep Counter timeout range is
256 times the prescaled clock (see Table 12 ).
1: Prescaler is divide-by-16. The 8-bit Sleep Counter input
clock is the samples per second set by AMSR[2:0] divided by
16, so the clock range is 4 Hz to 0.0625 Hz depending on
AMSR[2:0] setting. Sleep Counter timeout range is 256 times
the prescaled clock (see Table 12 ).
IPP
0: Interrupt output INT is open-drain.
1: Interrupt output INT is push-pull
NOTE: Do NOT connect pull-up resistor from INT to
higher voltage than DVDD.
IAH
0: Interrupt output INT is active low
1: Interrupt output INT is active high
selected interrupt, the device will then switch to the samples
per second specified in AMSR[2:0] of the SR (0x08) register.
If ASE = 1, then Auto-Sleep functionality is now enabled
The active interrupt condition (IRQ = 0 if IAH = 0, IRQ = 1 if IAH = 1) is released during the acknowledge bit of the slave address
transmission of the first subsequent I 2 C to the device after the interrupt was asserted.
MMA7660FC
Sensors
17
Freescale Semiconductor, Inc.
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